17 research outputs found

    Network convergence and QoS for future multimedia services in the VISION project

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    The emerging use of real-time 3D-based multimedia applications imposes strict quality of service (QoS) requirements on both access and core networks. These requirements and their impact to provide end-to-end 3D videoconferencing services have been studied within the Spanish-funded VISION project, where different scenarios were implemented showing an agile stereoscopic video call that might be offered to the general public in the near future. In view of the requirements, we designed an integrated access and core converged network architecture which provides the requested QoS to end-to-end IP sessions. Novel functional blocks are proposed to control core optical networks, the functionality of the standard ones is redefined, and the signaling improved to better meet the requirements of future multimedia services. An experimental test-bed to assess the feasibility of the solution was also deployed. In such test-bed, set-up and release of end-to-end sessions meeting specific QoS requirements are shown and the impact of QoS degradation in terms of the user perceived quality degradation is quantified. In addition, scalability results show that the proposed signaling architecture is able to cope with large number of requests introducing almost negligible delay

    DVINO: A RISC-V vector processor implemented in 65nm technology

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    This paper describes the design, verification, implementation and fabrication of the Drac Vector IN-Order (DVINO) processor, a RISC-V vector processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The DVINO processor includes an internally developed two-lane vector processor unit as well as a Phase Locked Loop (PLL) and an Analog-to-Digital Converter (ADC). The paper summarizes the design from architectural as well as logic synthesis and physical design in CMOS 65nm technology.The DRAC project is co-financed by the European Union Regional Development Fund within the framework of the ERDF Operational Program of Catalonia 2014-2020 with a grant of 50% of total eligible cost. The authors are part of RedRISCV which promotes activities around open hardware. The Lagarto Project is supported by the Research and Graduate Secretary (SIP) of the Instituto Politecnico Nacional (IPN) from Mexico, and by the CONACyT scholarship for Center for Research in Computing (CIC-IPN).Peer ReviewedArticle signat per 43 autors/es: Guillem Cabo∗, Gerard Candón∗, Xavier Carril∗, Max Doblas∗, Marc Domínguez∗, Alberto González∗, Cesar Hernández†, Víctor Jiménez∗, Vatistas Kostalampros∗, Rubén Langarita∗, Neiel Leyva†, Guillem López-Paradís∗, Jonnatan Mendoza∗, Francesco Minervini∗, Julian Pavón∗, Cristobal Ramírez∗, Narcís Rodas∗, Enrico Reggiani∗, Mario Rodríguez∗, Carlos Rojas∗, Abraham Ruiz∗, Víctor Soria∗, Alejandro Suanes‡, Iván Vargas∗, Roger Figueras∗, Pau Fontova∗, Joan Marimon∗, Víctor Montabes∗, Adrián Cristal∗, Carles Hernández∗, Ricardo Martínez‡, Miquel Moretó∗§, Francesc Moll∗§, Oscar Palomar∗§, Marco A. Ramírez†, Antonio Rubio§, Jordi Sacristán‡, Francesc Serra-Graells‡, Nehir Sonmez∗, Lluís Terés‡, Osman Unsal∗, Mateo Valero∗§, Luís Villa† // ∗Barcelona Supercomputing Center (BSC), Barcelona, Spain. Email: [email protected]; †Centro de Investigación en Computación, Instituto Politécnico Nacional (CIC-IPN), Mexico City, Mexico; ‡ Institut de Microelectronica de Barcelona, IMB-CNM (CSIC), Spain. Email: [email protected]; §Universitat Politecnica de Catalunya (UPC), Barcelona, Spain. Email: [email protected] (author's final draft

    Microsoft Word - etrij.aug2010.0622

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    In this letter, we assess the scalability of a path computation flooding (PCF

    Analysis of traffic engineering information dissemination strategies in PCE-based multi-domain optical networks

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    This paper presents and compares different TE information dissemination strategies between Path Computation Elements (PCEs) in multi-domain optical networks. In such network context, recent studies have found that path computation only with local domain visibility yields poor network performance. Accordingly, certain visibility between domains seems necessary. Aiming to fit the confidentiality requirements of the composing domains while improving the final network blocking probability, novel link aggregation techniques have been proposed, which summarize the state of network domains resources efficiently. This aggregated link information is afterwards disseminated to all the remainder domains in the network. To this end, we introduce different update triggering policies to make a good trade-off between routing information scalability and inaccuracy. The performance of all contributions has been supported by illustrative simulation results

    Design procedures for fibre-reinforced rocket-motor cases

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    SIGLEAvailable from British Library Document Supply Centre- DSC:2265.63F(BR--99277)(microfiche) / BLDSC - British Library Document Supply CentreGBUnited Kingdo

    Scalable hybrid path computation procedure for PCE-based

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    In the Hierarchical Path Computation Element (H-PCE) architecture, an optimum end-to-end path is computed using a hierarchical relationship among PCEs. An H-PCE-based path computation procedure provides low network blocking probability meanwhile it results on a great amount of control overhead messages. In this paper we propose a hybrid path computation procedure based on the H-PCE architecture and the Backward Recursive PCE-Based Computation (BRPC). Extensive simulation results show that the proposed approach performs better than H-PCE in terms of network control overhead.Peer ReviewedPostprint (published version

    Scalable hybrid path computation procedure for PCE-based

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    In the Hierarchical Path Computation Element (H-PCE) architecture, an optimum end-to-end path is computed using a hierarchical relationship among PCEs. An H-PCE-based path computation procedure provides low network blocking probability meanwhile it results on a great amount of control overhead messages. In this paper we propose a hybrid path computation procedure based on the H-PCE architecture and the Backward Recursive PCE-Based Computation (BRPC). Extensive simulation results show that the proposed approach performs better than H-PCE in terms of network control overhead.Peer Reviewe

    The real-time control of water resource systems

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    SIGLEAvailable from British Library Document Supply Centre- DSC:D35934/81 / BLDSC - British Library Document Supply CentreGBUnited Kingdo

    Scalable hybrid path computation procedure for PCE-based

    No full text
    In the Hierarchical Path Computation Element (H-PCE) architecture, an optimum end-to-end path is computed using a hierarchical relationship among PCEs. An H-PCE-based path computation procedure provides low network blocking probability meanwhile it results on a great amount of control overhead messages. In this paper we propose a hybrid path computation procedure based on the H-PCE architecture and the Backward Recursive PCE-Based Computation (BRPC). Extensive simulation results show that the proposed approach performs better than H-PCE in terms of network control overhead.Peer Reviewe
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